1. Field of the Invention
The present invention relates to a passive bus system for decentrally organized multi-computer systems, particularly multi-systems incorporating plural microcomputers.
2. The Prior Art
Multi-computer systems which employ currently available microcomputers (for example, INTEL microcomputer Model 8086) require bus transmission speeds of at most 3 M bits per second. When the bits of data words are transmitted in parallel, the cost of system components such as transmitters, receivers, lines and equalizers, is n-times as high as the comparable system in which serial transmission is used, where n is the number of bits transferred simultaneously in parallel. On the other hand, with serial transmission, the bandwidth is increased by the factor n. The additional expense of increasing the bandwidth however, would have no effect on the cost of the system components. If additional technical devices were necessary for the increase in bandwidth, the system reliability would be decreased.
Because of constantly increasing demands which are made on multi-computer systems, which requires an increase in the processing speed of the overall system, a serial transmission mechanism is not realizable with conventional apparatus.